Занятость:
Полная

График работы:
Полный день

Требования:
Host interface logic design & verification
rtl coding and synthesis
background of the network protocol‚ and osi 7 layer
soc chip design
amba-based bus protocol design experience
arm-based soc chip design
familiar with using the specman or system verilog verification language

Должностные обязанности:
Signal processing algorithm implementation(ecc-ip design)
rtl coding and synthesis
background of the channel codes & signal processing
error control codes (ecc): bch‚ rs-code etc
ip modeling & verification
fast prototyping
auto-generation of the ecc-ip
fpga implementation